[PATCH] iio: accel: adxl372: replace manual bitfield ops with FIELD_GET/FIELD_PREP

[Caio Groff]

From: Caio Groff <caio.groff em usp.br>

Replace manual bit shifting and masking with FIELD_GET() and FIELD_PREP()
macros for clarity and consistency with kernel coding style.

Signed-off-by: Caio Groff <caio.groff em usp.br>
---
 drivers/iio/accel/adxl372.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/accel/adxl372.c b/drivers/iio/accel/adxl372.c
index e375d068a3f5..fb985bfeb19f 100644
--- a/drivers/iio/accel/adxl372.c
+++ b/drivers/iio/accel/adxl372.c
@@ -150,6 +150,11 @@
 #define ADXL372_Y_AXIS_EN(x)			((x) & BIT(1))
 #define ADXL372_Z_AXIS_EN(x)			((x) & BIT(2))
 
+/* ADXL372_TIME_INACT */
+#define ADXL372_TIME_INACT_MASK_H  GENMASK(15, 8)
+#define ADXL372_TIME_INACT_MASK_L  GENMASK(7, 0)
+
+
 /*
  * At +/- 200g with 12-bit resolution, scale is computed as:
  * (200 + 200) * 9.81 / (2^12 - 1) = 0.958241
@@ -577,9 +582,8 @@ static int adxl372_set_inactivity_time_ms(struct adxl372_state *st,
 		scale_factor = st->chip_info->inact_time_scale_low_ms;
 
 	res = DIV_ROUND_CLOSEST(inact_time_ms, scale_factor);
-	reg_val_h = (res >> 8) & 0xFF;
-	reg_val_l = res & 0xFF;
-
+	reg_val_h = FIELD_GET(ADXL372_TIME_INACT_MASK_H, res);
+	reg_val_l = FIELD_GET(ADXL372_TIME_INACT_MASK_L, res);
 	ret = regmap_write(st->regmap, ADXL372_TIME_INACT_H, reg_val_h);
 	if (ret < 0)
 		return ret;
-- 
2.53.0